News and press releases

Europe’s need for semiconductors will nearly double by 2040 — to various degrees depending on the market segment and technology node, but the trend is clear (Source: ZVEI Study 2026: Europe’s Semicon Business Case – A Demand-Driven Perspective for a Competitive and Resilient Microelectronics Ecosystem). Consequently, Europe does not have a demand problem. Rather, efforts to translate this demand into industrial value creation have so far been insufficient and too slow. Political strategies alone are not enough to secure a leading technological position. The crucial question is therefore: What do Europe and Germany need to remain competitive in the long term and play a decisive role in shaping the future of microelectronics? Where do future opportunities lie?

In advanced microelectronics, the competitive edge is no longer defined by individual technologies, but by the ability to integrate them into reliable, scalable systems. As chiplet-based architectures and heterogeneous integration become the new standard, the key challenge lies in translating fragmented capabilities into coherent production flows. The APECS Pilot Line addresses this shift by placing demonstrators at the center of its approach: not as showcases, but as integration testbeds that validate how technologies interact under real industrial conditions and ultimately deliver measurable system-level performance. This article was originally published by INSIDE Magazine.

Europe is investing billions to expand its semiconductor capabilities. But technological sovereignty depends on more than new fabs and funding programs. It also depends on how quickly innovations move from research into industrial applications. FIRST by FMD focuses on precisely this transition. With this new European trend forum for decision-makers, Research Fab Microelectronics Germany (FMD) is bringing together leading representatives from industry, research, and policy. FIRST, short for Fast Innovation through Research in Semiconductor Technologies, will take place on September 30 and October 1, 2026, at the EUREF Campus in Berlin.

For several years, technological sovereignty has been a central term in discussions about semiconductor technologies and global supply chains. It refers to the ability of a state or region to develop, control, and economically use technologies considered strategically important. In the semiconductor context, the objective is to reduce far-reaching dependencies on other countries or individual companies. As geopolitical tensions and chip shortages, particularly in the automotive industry, moved higher on the political agenda, technological sovereignty became closely associated with strategic autonomy.

From April 20 to 24, 2026, the Research Fab Microelectronics Germany (FMD) will be present at Hannover Messe. At the Fraunhofer joint booth (Hall 11, Booth D33), FMD will showcase application-oriented solutions addressing current industrial challenges – with a focus on the APECS pilot line and the German Chips Competence Centre (G3C) as two key pillars of Europe’s semiconductor strategy.

In this interview, Frank Altmann (Fraunhofer IMWS) explains how characterization, testing and reliability assessment throughout development help reduce risks in heterogeneous integration and support industrial applications within the APECS pilot line.

Governments in the EU, United States, and China are investing heavily in semiconductor manufacturing to strengthen resilience, reduce dependencies, and secure technological leadership. This article compares funding models, governance frameworks, and strategic objectives, with a focus on the EU Chips Act and its role in shaping Europe’s semiconductor ecosystem.

The APECS pilot line continues to grow in strategic importance. At SEMICON Europe 2025, APECS clearly demonstrated its refined technological focus, deepened European partnerships, and active contribution to the Chips for Europe Initiative. At the joint booth of Chips Joint Undertaking and during the STCO workshop, APECS showcased its latest advancements in heterogeneous integration, packaging, and design. Additionally, APECS participated in the European pilot line panel discussion and held bilateral expert talks with a Dutch delegation.

With the launch of the German Chips Competence Centre (G3C), companies and research institutions in Germany gain direct access to Europe's most advanced semiconductor infra-structure. Serving as a central gateway, the G3C links Germany’s semiconductor ecosystem with European design and manufacturing pilot lines, coordinates their use, and facilitates collaboration across EU member states. This allows German players to benefit earlier from the latest innovations, boosting Germany's position as a leading semiconductor hub beyond its borders. Over the next four years, the G3C will be established by the Research Fab Microelectronics Germany (FMD). It is funded by the European Union under the EU Chips Act, with additional national co-funding from the Fed-eral Ministry of Education and Research (BMFTR).

Silvaco Group, Inc. (Nasdaq: SVCO) (“Silvaco” or the “Company”), a provider of TCAD, EDA software, and SIP solutions that enable innovative semiconductor design and digital twin modeling through AI software and automation, today announced a strategic R&D collaboration with Fraunhofer Institute for Silicon Technology (ISIT). The partnership aims to accelerate development of next-generation Gallium Nitride (GaN) devices using Silvaco’s industry-leading Power Devices Solution to perform Design Technology Co-Optimization (DTCO). This collaboration aligns with Fraunhofer ISIT’s role in the EU Chips Act initiative through its participation in the APECS pilot line.