Greater reliability and reproducible processes for advanced packaging and microelectronics
With a new automated wafer cleaning system from Siconnex, Fraunhofer IZM is expanding the technological capabilities of the APECS pilot line in Berlin. The system supports research and development in the areas of advanced packaging, chiplet integration, and system integration. Automated wafer cleaning standardizes a process that was previously performed manually, improves workplace safety, and ensures consistently clean surfaces. These surfaces are a crucial foundation for subsequent bonding, packaging, and integration processes in microelectronics. This video kicks off the #BuildingAPECS series. It documents the development of the APECS pilot line as a research infrastructure for advanced packaging and microelectronics at Fraunhofer IZM. Are you interested in new packaging, chiplet, or integration solutions? Learn more about opportunities for collaboration with Fraunhofer IZM, the APECS pilot line, and the Research Fab Microelectronics Germany (FMD).