News and press releases

Europe is investing billions to expand its semiconductor capabilities. But technological sovereignty depends on more than new fabs and funding programs. It also depends on how quickly innovations move from research into industrial applications. FIRST by FMD focuses on precisely this transition. With this new European trend forum for decision-makers, Research Fab Microelectronics Germany (FMD) is bringing together leading representatives from industry, research, and policy. FIRST, short for Fast Innovation through Research in Semiconductor Technologies, will take place on September 30 and October 1, 2026, at the EUREF Campus in Berlin.

From April 20 to 24, 2026, the Research Fab Microelectronics Germany (FMD) will be present at Hannover Messe. At the Fraunhofer joint booth (Hall 11, Booth D33), FMD will showcase application-oriented solutions addressing current industrial challenges – with a focus on the APECS pilot line and the German Chips Competence Centre (G3C) as two key pillars of Europe’s semiconductor strategy.

In this interview, Frank Altmann (Fraunhofer IMWS) explains how characterization, testing and reliability assessment throughout development help reduce risks in heterogeneous integration and support industrial applications within the APECS pilot line.

Governments in the EU, United States, and China are investing heavily in semiconductor manufacturing to strengthen resilience, reduce dependencies, and secure technological leadership. This article compares funding models, governance frameworks, and strategic objectives, with a focus on the EU Chips Act and its role in shaping Europe’s semiconductor ecosystem.

The APECS pilot line continues to grow in strategic importance. At SEMICON Europe 2025, APECS clearly demonstrated its refined technological focus, deepened European partnerships, and active contribution to the Chips for Europe Initiative. At the joint booth of Chips Joint Undertaking and during the STCO workshop, APECS showcased its latest advancements in heterogeneous integration, packaging, and design. Additionally, APECS participated in the European pilot line panel discussion and held bilateral expert talks with a Dutch delegation.

With the launch of the German Chips Competence Centre (G3C), companies and research institutions in Germany gain direct access to Europe's most advanced semiconductor infra-structure. Serving as a central gateway, the G3C links Germany’s semiconductor ecosystem with European design and manufacturing pilot lines, coordinates their use, and facilitates collaboration across EU member states. This allows German players to benefit earlier from the latest innovations, boosting Germany's position as a leading semiconductor hub beyond its borders. Over the next four years, the G3C will be established by the Research Fab Microelectronics Germany (FMD). It is funded by the European Union under the EU Chips Act, with additional national co-funding from the Fed-eral Ministry of Education and Research (BMFTR).

Silvaco Group, Inc. (Nasdaq: SVCO) (“Silvaco” or the “Company”), a provider of TCAD, EDA software, and SIP solutions that enable innovative semiconductor design and digital twin modeling through AI software and automation, today announced a strategic R&D collaboration with Fraunhofer Institute for Silicon Technology (ISIT). The partnership aims to accelerate development of next-generation Gallium Nitride (GaN) devices using Silvaco’s industry-leading Power Devices Solution to perform Design Technology Co-Optimization (DTCO). This collaboration aligns with Fraunhofer ISIT’s role in the EU Chips Act initiative through its participation in the APECS pilot line.

Efficient failure analysis is essential for high-performance electronic applications and the development of cutting-edge solutions for the European semiconductor industry. This was the conclusion of the CAM workshop at the Fraunhofer Institute for Microstructure of Materials and Systems IMWS in Halle (Saale) yesterday. More than 150 international guests learned about possible applications for gallium nitride (GaN) and the pilot line for Advanced Packaging and Integration for Electronic Components and Systems (APECS).

A consortium of 12 European partners has been selected in the framework of the European Chips Act to develop the EU Chips Design Platform. This cloud-based platform will facilitate access to advanced semiconductor design infrastructure, training, and capital for fabless semiconductor start-ups, small and medium enterprises and research organizations. With the EU Chips Design Platform, coordinated by imec, an important new resource is being put in place to support technological development and industrial competitiveness across Europe. The German partners are the Fraunhofer institutes and the Leibniz IHP cooperating in the Research Fab Microelectronics Germany (FMD).

On March 31, 2025, at the Hannover Messe, the Research Fab Microelectronics Germany (Forschungsfabrik Mikroelektronik Deutschland FMD) officially unveiled its new Chiplet Application Hub. Designed to serve as a central platform for the development and application of chiplet technologies, the hub aims to bridge the gap between research and industrial use. By working closely with industry partners, the hub accelerates the development of chiplets made in Germany, elevating industrial research to a new level. At the national level, it complements FMD’s role in the Chips for Europe Initiative, further reinforcing Germany’s technological resilience. The hub's research, development, and prototyping activities build on the infrastructure of the APECS pilot line, ensuring direct pathways to industrial application.