Imaging Technologies, Post-CMOS Photonic Platform & IPD planar components

Overview

example for post cmos processing — © Fraunhofer ISIT

Within APECS, we offer an innovative and flexible technology portfolio that includes customizable imaging platforms, a post-CMOS photonics platform, and high-performance IPD planar components to unlock next-generation sensing and system integration. By seamlessly integrating electronics, photonics, and advanced passive components, we enable compact, high-performance, and application-tailored solutions across a wide range of industries. Our platforms are available to external partners looking to accelerate innovation, reduce development risk, and bring differentiated technologies to market faster.

Available services

Name	Description	Tools	Technical Details
Customizable imaging platforms	Device design and simulation (PDK) Process development Chip fabrication to pilot fabrication Device characterization	Post-CMOS process chain technologies (200 mm wafers) DUV stepper lithography (250 nm feature size) Deposition (CVD, PVD, ALD, Thermal…) Etching (DRIE, RIE, VPE …) W2W-Bonding Metrology	Micro-bolometer imagers: MWIR (3 µm–5 µm) and LWIR (8 µm–14 µm), 17 µm Pixel pitch, NETD < 60 mK (LWIR), Read-out circuits SPAD based imagers: UV to NIR (application specific), 25 µm–60 µm Pixel pitch, Quenching-circuits, Dark Count Rate < 50 cps @ room temp., BSI
Post-CMOS photonics platform	Customizable post-CMOS 200 mm photonics platform Device design and simulation (PDK) Process development Chip fabrication to pilot fabrication Device characterization	Process chain technologies (200 mm wafers) DUV stepper lithography (250 nm feature size) Deposition (CVD, PVD, ALD, Thermal…) Etching (DRIE, RIE, VPE …) Metrology	Building Blocks: waveguides, ring resonators, MZIs, MMIs, directional couplers, (focusing) grating couplers, thermo-optical tuning via Titanium heaters Material Platform: Silicon nitride (Si_XN_Y) and “PE-VIS” (Si_XN_Y with optimized transmission for visible wavelengths) via PECVD APECS Perspective: Si_XN_Y and AlN via PVD, Ta2O5 via ALD; CMP
IPD planar components	Integrated passive devices (IPD) on Si for low frequencies up to 15 GHz. IPD process on glass wafers also in roadmap.	12 Dicing 13 Wafer metrology	200 mm wafer size